Q1. how many address line are needed to address each memory location in 2048*4 memory chips
(A) 10
(B) 11
(C) 8
(D) 12


Q2. for DAC the resolution required is 50mV and the total maximum input is 10V. the number of bit required is
(A) 7
(B) 8
(C) 200
(D) 9


Q3. a 10bit A/D converter is used to digitize an analog signal in 00.5V range. the maximum peak to peak ripple voltage that can be allowed in DC voltage is
(A) nearly 100mV
(B) nearly 50mV
(C) nearly 25mV
(D) nearly 5mV


Q4. a memory system of size 16KB is required to be designed using memory chips which have 12 address lines and 4 data lines each. number of such chips required to design the memory system will be
(A) 2
(B) 4
(C) 8
(D) 16


Q5. the minimum number of comparators required to build an 8 bit flash ADC is
(A) 8
(B) 63
(C) 255
(D) 256


Q6. the number of distinct Boolean expression of 4 variables is
(A) 16
(B) 256
(C) 1024
(D) 65536


Q7. which of the following gates is known as coincidence detector
(A) AND
(B) OR
(C) NOT
(D) NAND


Q8. a comparison between serial and parallel adder reveals that serial adder
(A) is slower
(B) is faster
(C) operates at the same speed as parallel adder
(D) is more complicated


Q9. half adder is also known as
(A) AND circuit
(B) NAND circuit
(C) NOR circuit
(D) EX-OR circuit


Q10. Decimal equivalent of hex E5 is
(A) 200
(B) 120
(C) 234
(D) 229


Q11. an R-S latch is a
(A) combinational circuit
(B) synchronous sequential circuit
(C) one bit memory element
(D) one clock delay element


Q12. a dynamic RAM consists of
(A) 6 transistors
(B) 2 transistors and 2 capacitors
(C) 1 transistor and 1 capacitor
(D) 2 capacitors only


Q13. a carry look ahead adder is frequently used for addition because, it
(A) is faster
(B) is more accurate
(C) uses fewer gates
(D) costs less


Q14. which one of the following can be used as parallel to series converter
(A) decoder
(B) digital counter
(C) multiplexer
(D) demultiplexer


Q15. which of the following is a self-complementing code
(A) 8421 code
(B) excess 3 code
(C) pure binary code
(D) gray code


Q16. which one of the following D/A converter has the resolution of approximately 0.4% of its full scale range
(A) 8 bit
(B) 10 bit
(C) 12 bit
(D) 16 bit


Q17. which of the following counters can be used to divide the clock frequency of a microprocessor by 5
(A) 3 bit counter
(B) 5 bit counter
(C) mod 3 counter
(D) mod 5 counter


Q18. which of the following circuits come under the class of sequential logic circuits
(A) full adder
(B) full subtractor
(C) half adder
(D) J-K flip flop and counter


Q19. Race around conditions will occur when
(A) J=K=00
(B) J=K=1
(C) J=K=2
(D) J=K=0


Q20. FLIP FLOPS can store
(A) one bit of information
(B) 8bytes of information
(C) 16 bit of information
(D) 4bit of information


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