Q1. A triple bus architecture based processor has
(A) 3 data buses
(B) 3 control buses
(C) 3 address buses
(D) all of the above

Q2. An opcode
(A) translates a mnemonic
(B) stores data
(C) instructs the CPU
(D) all of the above

Q3. the microprocessor 8085 has-----basic instructions and ----- opcodes
(A) 80246
(B) 70346
(C) 80346
(D) 70246

Q4. in which unit is the performance of cache memory measured
(A) Hz
(B) bits/s
(C) cache constant
(D) hit ratio

Q5. first generation period of computer between
(A) 1945-1950
(B) 1942-1955
(C) 1946-1955
(D) none of these

Q6. The invention of transistors was in ______ generation of computers
(A) first
(B) second
(C) third
(D) fifth

Q7. binary coded decimal (BCD) numbers expressed each digit as a
(A) byte
(B) bit
(C) nibble
(D) all of the above

Q8. ACK indicates reception of
(A) correct data
(B) incorrect data
(C) insufficient data
(D) sufficient data

Q9. how many bits in MAC adress
(A) 32bits
(B) 48bits
(C) 128bits
(D) 4bits

Q10. The maximun integer which can be stored on an 8- bit accumulator is
(A) 2 kb
(B) 224
(C) 200
(D) 255

Q11. Which of the following is a hardware intrupt
(A) RST 6.5
(B) RST 6
(C) RST 7
(D) RST 4

Q12. What is the frequency of 4004 microprocessor
(A) 750khz
(B) 1khz
(C) 7.5khz
(D) 8mhz

Q13. which is the first Microprocessor
(A) 8085
(B) Intel Pentium 3
(C) AMD 32 bit
(D) Intel 4004

Q14. number of software interrupts of 8085
(A) 2
(B) 4
(C) 6
(D) 8

Q15. number of hardware interrupts in 8085
(A) 1
(B) 3
(C) 5
(D) 7

Q16. 8085 is based on which technology
(A) pmos
(B) N-MOS
(C) hmos
(D) hnmos

Q17. slowest data transfer mode in DMA controller
(A) block transfer mode
(B) single byte transfer mode
(C) demand transfer mode
(D) cascade mode

Q18. fastest data transfer mode in DMA controller
(A) demand transfer mode
(B) transparent mode
(C) block transfer mode
(D) burst or block transfer mode

Q19. The CALL instruction is comes under the
(A) data transfer instruction
(B) bit manipulation instruction
(C) string instruction
(D) Unconditional transfer function

Q20. the number of minimum clock cycles in a machine cycle for 8085 are
(A) 1
(B) 2
(C) 3
(D) 5

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